We often get asked about how much can a raw CMOS digital IO pin drive directly from a CPLD/FPGA/CPU. You can look at the IC manufacturers current ratings and usually get something like 4-12mA. but this is only partially true. Current ratings on CMOS output pins are determined based on max current that still result in a valid logic level. In the case of an 8mA rated output sinking its rated 8mA of current the voltage measured at the output pin is guaranteed to be <= 0.4V (which is still a valid 0). If you exceed the current rating the voltage at the pin will rise to a point where it will no longer be interpreted as a valid '0' to another CMOS input (you can think of the output driver as a resistor to ground). If you're driving an LED, not another CMOS input, it doesn't matter if the voltage rises a bit so you can squeeze a bit more than the rated current out of the pin. You wouldn't want to go a lot more than the rated current, but certainly another 25% or so is doable and perfectly safe. Keep in mind it is almost always better to sink current than source current since the CMOS FETs that switch to ground almost always have better characteristics than the ones that switch to V+.

Driving an LED still is only safe with a current limiting resistor since once the forward voltage is exceeded, the LED basically behaves like a short circuit. There will be an excessive amount of current well beyond the output drive strength of the DIO which will cause excessive heat to build up in the DIO pin output and possibly burn it up. On a 3.3V IO, something around 240 ohm is a good starting point but depends on the diode forward voltage drop (which depends on color)

Driving a relay or a motor with a DIO pin is especially hazardous without a snubber to absorb the inductive kick when you de-energize it. Before you do attempt to drive something that may be inductive, do a wikipedia search on snubbers. The most common and simple type of snubber is a diode snubber which you can create with only one extra part (a diode). Driving a relay will usually require extra current capabilities that most CPU/FPGA DIO's can't source/sink -- you'll need to add a discrete drive transistor.

Also, be very careful about voltages you send to a DIO input. Some older 3.3V IC's are "5V tolerant" but most new chips nowadays are not. Some claim 5V tolerance with only a certain max duty cycle or only with a series resistor. These types get their 5V tolerance usually from an internal diode on the IC that "burns off" the excess voltage by in effect sending it to the 3.3V rail. Once the voltage exceeds .6V above the power rail, that internal protection diode goes into conduction. If you're not careful about limiting that current you can pop that internal diode, causing you to lose your 5V tolerance. Your IC input then sees the full 5V instead of the clamped 3.9V which then can pop the IC oxide layers and permanently destroy the inputs. Also, another thing to watch is if you have too many 5V inputs driving 3.3V chips with these types of clamp diodes, your entire 3.3V rail may rise across the entire PCB. This is also not good.